Press releases from technology organisations can sometimes be really exciting, often very predictable, and occasionally rather sparse. A recent announcement from the PCI-SIG, though, that says new PCI Express internal and external cables will use a CopprLink naming scheme, but nothing else, almost seems not worth announcing at all.
All of the team at PC Gamer get countless press releases in their inboxes, which is great as that makes finding news quite a bit easier. We got one the other day from the PCI-SIG (PCI Special Interest Group) that looked quite interesting to begin with but ultimately left us feeling somewhat exasperated by the absolute dearth of information.
It said, and I quote, “PCI-SIG announced the new naming scheme for PCIe Internal and External Cables will be CopprLink. The PCIe 5.0 and PCIe 6.0 Internal and External Cable Specifications are currently in development and are targeted for release in 2024.”
That was it. Nothing about the cables themselves, just that they’ll use a name that makes it look like I can’t type. The first thing that sprung to my mind was something that Jacob and I were discussing the other day and that’s the current OCuLink system.
This is the name for an internal/external PCI cable technology, with the specification covering an electrical signalling method (the Cu part of the name, i.e Copper) and an optical version (the O bit, of course). This supports PCIe 4.0 and uses up to eight lanes to transmit data, though the spec doesn’t include power delivery.
Are PCI-SIG telling us that CopprLink will replace OCuLink or will it exist alongside? Will it just be for data or can we expect some of the cabling to supply power? Well, the group will be offering demonstrations of PCIe technology at the SC23 event, an international conference that heavily focuses on HPC (high performance computing). Perhaps it will be more forthcoming in these talks and we’ll get some answers then.
Although the announcement doesn’t directly state this, I think it’s safe to assume that CopprLink will be solely for PCIe 5.0 and 6.0 cabling and the market best suited for these is the HPC one. However, I think there’s scope for it to be used with future projects similar to the GDP G1 (image at the start of this story) and the recent OneXGPU.
That unit houses an external GPU, an M.2 SSD, and a good number of IO ports. Using all of them at once is greatly limited by the current options we have for such systems, e.g. USB4 Gen 2 or OCuLink. In short, they just can’t provide enough bandwidth to prevent a GPU+SSD+IO from being performance limited.
A cable that has eight PCIe 5.0 lanes, though, should have more than enough bandwidth and if it can supply power too, then it would be a great way to extend the capabilities of a laptop or handheld device. How easy it would be to implement this is another matter entirely as PCIe 5.0 is still pretty new in the world of PCs.
On the PCI-SIG site, it indicates that the CopprLink internal cable Specification for PCIe 5.0 and 6.0 is still in the draft phase, with the review period for v0.9 closing in February 2024. We might get to hear more about it soon, if some of the SC23 attendees mention something, but I suspect it will be a good while before any more details are released.